Technical Safety Concept
16 chapters Learn how to turn safety goals into real hardware and software requirements, from deriving Technical Safety Requirements through FTTI analysis, ASIL decomposition, safety mechanism selection, HSI specification, dependent failure analysis, and hardware metric validation (SPFM, LFM, PMHF), all aligned with ISO 26262 Part 4.
How You Learn
Video and text stay in sync. As you scroll through the chapter, the video jumps to the matching explanation automatically.
Learning Objectives
Derive Technical Safety Requirements
Transform functional safety requirements into implementable, testable technical safety requirements with full ASIL (Automotive Safety Integrity Level) attribution.
Allocate Requirements to Architecture
Systematically allocate TSRs (Technical Safety Requirements) to hardware, software, and external measures with justified design decisions.
Select Appropriate Safety Mechanisms
Choose and specify safety mechanisms that achieve required diagnostic coverage for your ASIL (Automotive Safety Integrity Level) level.
Calculate HW (Hardware) Architectural Metrics
Apply PMHF (Probabilistic Metric for random Hardware Failures), SPFM (Single-Point Fault Metric), and LFM (Latent Fault Metric) calculations and verify compliance against ISO 26262 Part 5 targets.
Chapters
What is a TSC (Technical Safety Concept)?
Understand the purpose, scope, and critical role of the Technical Safety Concept as the bridge between functional safety requirements and hardware/software design in the ISO 26262 lifecycle.
TSC in the Safety Lifecycle
Trace the TSC through ISO 26262-4 phases and understand its inputs from the FSC, outputs to HW/SW development, and dependencies on HARA and safety goals.
Development Workflow
Follow the complete TSC development process from initial inputs through iterative refinement, covering workflow gates, review checkpoints, and tool-supported activities.
Writing Technical Safety Requirements
Learn how to derive verifiable, ASIL-attributed TSRs from functional safety requirements with proper traceability, testability criteria, and allocation rationale.
FTTI & Safe States
Master Fault Tolerant Time Interval (FTTI) analysis, safe state definition, FDTI/FRTI/EOTTI/MFTTI timing parameters, and emergency operation strategies for degraded modes.
Architecture & Patterns
Compare safety architecture patterns (1oo1D, 1oo2, 1oo2D, TMR/2oo3) and allocate technical safety requirements to hardware, software, and external measures with ASIL decomposition rationale.
ASIL Decomposition
Apply ASIL decomposition per ISO 26262-9 with freedom from interference (FFI) arguments, independence criteria, coexistence analysis, and decomposition algebra for complex architectures.
Safety Mechanisms
Survey the complete catalog of hardware, software, communication, and system-level safety mechanisms with diagnostic coverage values, ASIL applicability, and implementation trade-offs.
Interfaces & Communication Safety
Define safe communication protocols, E2E protection mechanisms, bus monitoring, and inter-element interface requirements for CAN, LIN, Ethernet, and SPI.
HSI Specification
Document the Hardware-Software Interface with signal definitions, register maps, timing constraints, diagnostic interfaces, and safety-relevant attributes per ISO 26262-4 Clause 6.5.
Malfunction Analysis
Perform systematic malfunction analysis at system level to identify failure modes, effect propagation paths, fault coverage gaps, and residual risks using FMEA and FTA.
Dependent Failure Analysis (DFA)
Analyze common cause failures (CCF), cascading failures, and common mode failures per ISO 26262-9 with systematic identification methods and mitigation strategies.
Hardware Metrics
Calculate SPFM, LFM, and PMHF in the TSC context, verify compliance against ASIL B/C/D targets, apply failure rate data, and validate diagnostic coverage assumptions.
Verification & Release
Plan and execute TSC verification activities including requirements reviews, architecture analysis, safety analysis confirmation, metric verification, and integration testing.
Complete Worked Example
Walk through a complete ASIL D powertrain TSC from FSC inputs through TSR derivation, architecture allocation, safety mechanism selection, metric calculation, and verification evidence.
Toolkit & Advanced Reference
Access TSC templates, checklists, clause-by-clause ISO 26262-4 reference, assessor preparation guides, common pitfalls, and a comprehensive glossary of 100+ safety terms.
Interactive Tools
Architecture Pattern Selector
Compare Single-Channel, Dual-Channel Monitor, Dual-Channel Redundant, and TMR (Triple Modular Redundancy) patterns with ASIL capability and trade-offs.
Safety Mechanisms Chart
Interactive scatter plot of safety mechanisms by effectiveness vs. complexity, with clickable data points showing ASIL applicability and characteristics.
Failure-to-Mechanism Mapper
Select failure types (sensor stuck-at, CPU lockup, memory corruption, CAN message loss) and see detection and mitigation mechanisms with diagnostic coverage.
Hardware Metrics Visualization
SPFM (Single-Point Fault Metric), LFM (Latent Fault Metric), and PMHF (Probabilistic Metric for random Hardware Failures) charts with target vs. achieved comparisons and formula displays.
Requirements Allocation Chart
Visualize how technical safety requirements are allocated to hardware and software elements with ASIL decomposition rationale.
FMEDA (Failure Modes, Effects, and Diagnostic Analysis) Simulator
FeaturedFull interactive simulator to develop and validate safety mechanisms with failure rate inputs, diagnostic coverage calculations, and ASIL compliance checks.
Explore SimulatorsComplete EPS (Electric Power Steering) Technical Safety Concept
See how a real-world EPS system translates functional safety goals into technical requirements, system architecture allocation, and safety mechanisms with full traceability.
- Safety goal SG-01 decomposed into 7 traceable TSRs (Technical Safety Requirements) with ASIL D inheritance
- Dual-processor monitoring architecture with cross-channel comparison at 10 ms cycle
- FMEA (Failure Mode and Effects Analysis)-driven safety mechanism selection: torque plausibility, end-stop detection, watchdog
- HSI (Hardware-Software Interface) specification with 47 signals and timing budgets
- PMHF (Probabilistic Metric for random Hardware Failures) calculation: 2.3 × 10⁻⁸ h⁻¹ against ASIL D target of < 10⁻⁷ h⁻¹
TSR (Technical Safety Requirement) Allocation Matrix
Ready to Master Technical Safety Concepts?
Start your journey through 16 comprehensive chapters covering FTTI analysis, ASIL decomposition, DFA, safety mechanisms, HSI specification, hardware metrics, and a complete ASIL D worked example.
Start Learning Now